Category cad
- Coil64-2.1.26 inductance coil calculator
- abc-1.01.20210519 system for sequential logic synthesis and verification
- dxf2gcode-20191025p2 tool to convert 2D (dxf, pdf, ps) files to gcode
- freehdl-0.0.7p5 open-source (C++ generating) VHDL simulator
- fritzing-0.9.2bp6 interactive electronics designing software
- geda-gaf-1.6.0p23 suite of tools for electronic design automation
- gerbv-2.7.0p2 viewer for Gerber (RS-274X) files
- gnucap-0.35p9 Gnu Circuit Analysis Package
- graywolf-0.1.6p2 placement tool used in VLSI design
- gtkwave-3.3.113 GTK+-based electronic waveform viewer
- kicad-6.0.9p0v0 schematic and PCB editing software
- kicad-footprints-6.0.9 footprint modules for KiCad
- kicad-packages3D-6.0.9 3D packages for KiCad
- kicad-symbols-6.0.9v0 symbol modules for KiCad
- kicad-templates-6.0.9 templates for KiCad
- lepton-eda-1.9.18p0 lepton electronic design automation suite
- libngspice-31 ngspice shared library, based on Berkeley SPICE
- librecad-2.2.0rc1p2 2D CAD program
- magic-8.3.340p0 interactive system for VLSI circuit layouts
- necpp-1.2.3p8 NEC2++ antenna simulator
- netgen-1.5.171p1 tool for netlist comparison (LVS) and format manipulation
- ngspice-31 circuit simulator, based on Berkeley SPICE
- oce-7.6.0p0 C++ 3d modeling library
- openscad-2021.01p3 the programmer's solid 3D CAD modeller
- opensta-2.2.0p0 Parallax Static Timing Analyzer
- pcb-4.3.0v0 printed circuit board layout tool
- pcb2gcode-2.4.0p2 tool for isolation, routing, and drilling of PCBs
- qcad-3.27.9.0 Qt-based 2D CAD system
- qelectrotech-0.70p0 electric diagrams drawing tool
- qflow-1.4.83p1 full end-to-end digital synthesis flow for VLSI ASIC designs
- qrouter-1.4.84 multi-level, over-the-cell maze router for VLSI design
- tkgate-2.1 Tcl/Tk based digital circuit editor and simulator
- xcircuit-3.7.57 circuit drawing and schematic capture
- xnecview-1.37p0 NEC2 antenna simulator visualizer
- xschem-3.1.0 hierarchical schematic capture program
- xtrkcad-5.2.2p1 CAD program for designing model railroad layouts
- yosys-0.9pl4081p1 framework for Verilog RTL synthesis