The cad/yosys port
yosys-0.9pl4081p3 – framework for Verilog RTL synthesis (cvsweb github mirror)
Description
Yosys Open SYnthesis Suite Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains. Selected features and typical applications: - Process almost any synthesizable Verilog-2005 design - Converting Verilog to BLIF / EDIF/ BTOR / SMT-LIB / simple RTL Verilog / etc. - Built-in formal methods for checking properties and equivalence - Mapping to ASIC standard cell libraries (in Liberty File Format) - Mapping to Xilinx 7-Series and Lattice iCE40 FPGAs - Foundation and/or front-end for custom flows Yosys can be adapted to perform any synthesis job by combining the existing passes (algorithms) using synthesis scripts and adding additional passes as needed by extending the Yosys C++ code base.WWW: http://www.clifford.at/yosys/
Maintainer
Alessandro De Laurenzis
Only for arches
aarch64 alpha amd64 arm hppa i386 mips64 mips64el powerpc powerpc64 riscv64 sparc64
Categories
Library dependencies
Build dependencies
Run dependencies
Test dependencies
Files
- /usr/local/bin/yosys
- /usr/local/bin/yosys-config
- /usr/local/bin/yosys-filterlib
- /usr/local/bin/yosys-smtbmc
- /usr/local/share/yosys/
- /usr/local/share/yosys/abc9_map.v
- /usr/local/share/yosys/abc9_model.v
- /usr/local/share/yosys/abc9_unmap.v
- /usr/local/share/yosys/achronix/
- /usr/local/share/yosys/achronix/speedster22i/
- /usr/local/share/yosys/achronix/speedster22i/cells_map.v
- /usr/local/share/yosys/achronix/speedster22i/cells_sim.v
- /usr/local/share/yosys/adff2dff.v
- /usr/local/share/yosys/anlogic/
- /usr/local/share/yosys/anlogic/arith_map.v
- /usr/local/share/yosys/anlogic/cells_map.v
- /usr/local/share/yosys/anlogic/cells_sim.v
- /usr/local/share/yosys/anlogic/eagle_bb.v
- /usr/local/share/yosys/anlogic/lutram_init_16x4.vh
- /usr/local/share/yosys/anlogic/lutrams.txt
- /usr/local/share/yosys/anlogic/lutrams_map.v
- /usr/local/share/yosys/cells.lib
- /usr/local/share/yosys/cmp2lcu.v
- /usr/local/share/yosys/cmp2lut.v
- /usr/local/share/yosys/coolrunner2/
- /usr/local/share/yosys/coolrunner2/cells_counter_map.v
- /usr/local/share/yosys/coolrunner2/cells_latch.v
- /usr/local/share/yosys/coolrunner2/cells_sim.v
- /usr/local/share/yosys/coolrunner2/tff_extract.v
- /usr/local/share/yosys/coolrunner2/xc2_dff.lib
- /usr/local/share/yosys/dff2ff.v
- /usr/local/share/yosys/ecp5/
- /usr/local/share/yosys/ecp5/arith_map.v
- /usr/local/share/yosys/ecp5/bram_conn_1.vh
- /usr/local/share/yosys/ecp5/bram_conn_18.vh
- /usr/local/share/yosys/ecp5/bram_conn_2.vh
- /usr/local/share/yosys/ecp5/bram_conn_36.vh
- /usr/local/share/yosys/ecp5/bram_conn_4.vh
- /usr/local/share/yosys/ecp5/bram_conn_9.vh
- /usr/local/share/yosys/ecp5/bram_init_1_2_4.vh
- /usr/local/share/yosys/ecp5/bram_init_9_18_36.vh
- /usr/local/share/yosys/ecp5/brams.txt
- /usr/local/share/yosys/ecp5/brams_map.v
- /usr/local/share/yosys/ecp5/cells_bb.v
- /usr/local/share/yosys/ecp5/cells_ff.vh
- /usr/local/share/yosys/ecp5/cells_io.vh
- /usr/local/share/yosys/ecp5/cells_map.v
- /usr/local/share/yosys/ecp5/cells_sim.v
- /usr/local/share/yosys/ecp5/dsp_map.v
- /usr/local/share/yosys/ecp5/latches_map.v
- /usr/local/share/yosys/ecp5/lutrams.txt
- /usr/local/share/yosys/ecp5/lutrams_map.v
- /usr/local/share/yosys/efinix/
- /usr/local/share/yosys/efinix/arith_map.v
- /usr/local/share/yosys/efinix/brams.txt
- /usr/local/share/yosys/efinix/brams_map.v
- /usr/local/share/yosys/efinix/cells_map.v
- /usr/local/share/yosys/efinix/cells_sim.v
- /usr/local/share/yosys/efinix/gbuf_map.v
- /usr/local/share/yosys/gate2lut.v
- /usr/local/share/yosys/gowin/
- /usr/local/share/yosys/gowin/arith_map.v
- /usr/local/share/yosys/gowin/bram_init_16.vh
- /usr/local/share/yosys/gowin/brams.txt
- /usr/local/share/yosys/gowin/brams_init3.vh
- /usr/local/share/yosys/gowin/brams_map.v
- /usr/local/share/yosys/gowin/cells_map.v
- /usr/local/share/yosys/gowin/cells_sim.v
- /usr/local/share/yosys/gowin/lutrams.txt
- /usr/local/share/yosys/gowin/lutrams_map.v
- /usr/local/share/yosys/greenpak4/
- /usr/local/share/yosys/greenpak4/cells_blackbox.v
- /usr/local/share/yosys/greenpak4/cells_latch.v
- /usr/local/share/yosys/greenpak4/cells_map.v
- /usr/local/share/yosys/greenpak4/cells_sim.v
- /usr/local/share/yosys/greenpak4/cells_sim_ams.v
- /usr/local/share/yosys/greenpak4/cells_sim_digital.v
- /usr/local/share/yosys/greenpak4/cells_sim_wip.v
- /usr/local/share/yosys/greenpak4/gp_dff.lib
- /usr/local/share/yosys/ice40/
- /usr/local/share/yosys/ice40/abc9_model.v
- /usr/local/share/yosys/ice40/arith_map.v
- /usr/local/share/yosys/ice40/brams.txt
- /usr/local/share/yosys/ice40/brams_init1.vh
- /usr/local/share/yosys/ice40/brams_init2.vh
- /usr/local/share/yosys/ice40/brams_init3.vh
- /usr/local/share/yosys/ice40/brams_map.v
- /usr/local/share/yosys/ice40/cells_map.v
- /usr/local/share/yosys/ice40/cells_sim.v
- /usr/local/share/yosys/ice40/dsp_map.v
- /usr/local/share/yosys/ice40/ff_map.v
- /usr/local/share/yosys/ice40/latches_map.v
- /usr/local/share/yosys/include/
- /usr/local/share/yosys/include/backends/
- /usr/local/share/yosys/include/backends/cxxrtl/
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl.h
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl_capi.cc
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl_capi.h
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl_vcd.h
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl_vcd_capi.cc
- /usr/local/share/yosys/include/backends/cxxrtl/cxxrtl_vcd_capi.h
- /usr/local/share/yosys/include/backends/rtlil/
- /usr/local/share/yosys/include/backends/rtlil/rtlil_backend.h
- /usr/local/share/yosys/include/frontends/
- /usr/local/share/yosys/include/frontends/ast/
- /usr/local/share/yosys/include/frontends/ast/ast.h
- /usr/local/share/yosys/include/kernel/
- /usr/local/share/yosys/include/kernel/celledges.h
- /usr/local/share/yosys/include/kernel/celltypes.h
- /usr/local/share/yosys/include/kernel/consteval.h
- /usr/local/share/yosys/include/kernel/constids.inc
- /usr/local/share/yosys/include/kernel/ff.h
- /usr/local/share/yosys/include/kernel/ffinit.h
- /usr/local/share/yosys/include/kernel/hashlib.h
- /usr/local/share/yosys/include/kernel/log.h
- /usr/local/share/yosys/include/kernel/macc.h
- /usr/local/share/yosys/include/kernel/mem.h
- /usr/local/share/yosys/include/kernel/modtools.h
- /usr/local/share/yosys/include/kernel/register.h
- /usr/local/share/yosys/include/kernel/rtlil.h
- /usr/local/share/yosys/include/kernel/satgen.h
- /usr/local/share/yosys/include/kernel/sigtools.h
- /usr/local/share/yosys/include/kernel/utils.h
- /usr/local/share/yosys/include/kernel/yosys.h
- /usr/local/share/yosys/include/libs/
- /usr/local/share/yosys/include/libs/ezsat/
- /usr/local/share/yosys/include/libs/ezsat/ezminisat.h
- /usr/local/share/yosys/include/libs/ezsat/ezsat.h
- /usr/local/share/yosys/include/libs/json11/
- /usr/local/share/yosys/include/libs/json11/json11.hpp
- /usr/local/share/yosys/include/libs/sha1/
- /usr/local/share/yosys/include/libs/sha1/sha1.h
- /usr/local/share/yosys/include/passes/
- /usr/local/share/yosys/include/passes/fsm/
- /usr/local/share/yosys/include/passes/fsm/fsmdata.h
- /usr/local/share/yosys/intel/
- /usr/local/share/yosys/intel/common/
- /usr/local/share/yosys/intel/common/altpll_bb.v
- /usr/local/share/yosys/intel/common/brams_m9k.txt
- /usr/local/share/yosys/intel/common/brams_map_m9k.v
- /usr/local/share/yosys/intel/common/ff_map.v
- /usr/local/share/yosys/intel/common/m9k_bb.v
- /usr/local/share/yosys/intel/cyclone10lp/
- /usr/local/share/yosys/intel/cyclone10lp/cells_map.v
- /usr/local/share/yosys/intel/cyclone10lp/cells_sim.v
- /usr/local/share/yosys/intel/cycloneiv/
- /usr/local/share/yosys/intel/cycloneiv/cells_map.v
- /usr/local/share/yosys/intel/cycloneiv/cells_sim.v
- /usr/local/share/yosys/intel/cycloneive/
- /usr/local/share/yosys/intel/cycloneive/cells_map.v
- /usr/local/share/yosys/intel/cycloneive/cells_sim.v
- /usr/local/share/yosys/intel/max10/
- /usr/local/share/yosys/intel/max10/cells_map.v
- /usr/local/share/yosys/intel/max10/cells_sim.v
- /usr/local/share/yosys/intel_alm/
- /usr/local/share/yosys/intel_alm/common/
- /usr/local/share/yosys/intel_alm/common/abc9_map.v
- /usr/local/share/yosys/intel_alm/common/abc9_model.v
- /usr/local/share/yosys/intel_alm/common/abc9_unmap.v
- /usr/local/share/yosys/intel_alm/common/alm_map.v
- /usr/local/share/yosys/intel_alm/common/alm_sim.v
- /usr/local/share/yosys/intel_alm/common/arith_alm_map.v
- /usr/local/share/yosys/intel_alm/common/bram_m10k.txt
- /usr/local/share/yosys/intel_alm/common/bram_m20k.txt
- /usr/local/share/yosys/intel_alm/common/bram_m20k_map.v
- /usr/local/share/yosys/intel_alm/common/dff_map.v
- /usr/local/share/yosys/intel_alm/common/dff_sim.v
- /usr/local/share/yosys/intel_alm/common/dsp_map.v
- /usr/local/share/yosys/intel_alm/common/dsp_sim.v
- /usr/local/share/yosys/intel_alm/common/lutram_mlab.txt
- /usr/local/share/yosys/intel_alm/common/megafunction_bb.v
- /usr/local/share/yosys/intel_alm/common/mem_sim.v
- /usr/local/share/yosys/intel_alm/common/misc_sim.v
- /usr/local/share/yosys/intel_alm/common/quartus_rename.v
- /usr/local/share/yosys/intel_alm/cyclonev/
- /usr/local/share/yosys/intel_alm/cyclonev/cells_sim.v
- /usr/local/share/yosys/machxo2/
- /usr/local/share/yosys/machxo2/cells_map.v
- /usr/local/share/yosys/machxo2/cells_sim.v
- /usr/local/share/yosys/mul2dsp.v
- /usr/local/share/yosys/nexus/
- /usr/local/share/yosys/nexus/arith_map.v
- /usr/local/share/yosys/nexus/brams.txt
- /usr/local/share/yosys/nexus/brams_init.vh
- /usr/local/share/yosys/nexus/brams_map.v
- /usr/local/share/yosys/nexus/cells_map.v
- /usr/local/share/yosys/nexus/cells_sim.v
- /usr/local/share/yosys/nexus/cells_xtra.v
- /usr/local/share/yosys/nexus/dsp_map.v
- /usr/local/share/yosys/nexus/latches_map.v
- /usr/local/share/yosys/nexus/lrams.txt
- /usr/local/share/yosys/nexus/lrams_init.vh
- /usr/local/share/yosys/nexus/lrams_map.v
- /usr/local/share/yosys/nexus/lutrams.txt
- /usr/local/share/yosys/nexus/lutrams_map.v
- /usr/local/share/yosys/nexus/parse_init.vh
- /usr/local/share/yosys/pmux2mux.v
- /usr/local/share/yosys/python3/
- /usr/local/share/yosys/python3/__pycache__/
- /usr/local/share/yosys/python3/__pycache__/smtio.cpython-311.opt-1.pyc
- /usr/local/share/yosys/python3/__pycache__/smtio.cpython-311.pyc
- /usr/local/share/yosys/python3/smtio.py
- /usr/local/share/yosys/quicklogic/
- /usr/local/share/yosys/quicklogic/abc9_map.v
- /usr/local/share/yosys/quicklogic/abc9_model.v
- /usr/local/share/yosys/quicklogic/abc9_unmap.v
- /usr/local/share/yosys/quicklogic/cells_sim.v
- /usr/local/share/yosys/quicklogic/lut_sim.v
- /usr/local/share/yosys/quicklogic/pp3_cells_map.v
- /usr/local/share/yosys/quicklogic/pp3_cells_sim.v
- /usr/local/share/yosys/quicklogic/pp3_ffs_map.v
- /usr/local/share/yosys/quicklogic/pp3_latches_map.v
- /usr/local/share/yosys/quicklogic/pp3_lut_map.v
- /usr/local/share/yosys/sf2/
- /usr/local/share/yosys/sf2/arith_map.v
- /usr/local/share/yosys/sf2/cells_map.v
- /usr/local/share/yosys/sf2/cells_sim.v
- /usr/local/share/yosys/simcells.v
- /usr/local/share/yosys/simlib.v
- /usr/local/share/yosys/techmap.v
- /usr/local/share/yosys/xilinx/
- /usr/local/share/yosys/xilinx/abc9_model.v
- /usr/local/share/yosys/xilinx/arith_map.v
- /usr/local/share/yosys/xilinx/brams_init_16.vh
- /usr/local/share/yosys/xilinx/brams_init_18.vh
- /usr/local/share/yosys/xilinx/brams_init_32.vh
- /usr/local/share/yosys/xilinx/brams_init_36.vh
- /usr/local/share/yosys/xilinx/brams_init_8.vh
- /usr/local/share/yosys/xilinx/brams_init_9.vh
- /usr/local/share/yosys/xilinx/cells_map.v
- /usr/local/share/yosys/xilinx/cells_sim.v
- /usr/local/share/yosys/xilinx/cells_xtra.v
- /usr/local/share/yosys/xilinx/ff_map.v
- /usr/local/share/yosys/xilinx/lut4_lutrams.txt
- /usr/local/share/yosys/xilinx/lut6_lutrams.txt
- /usr/local/share/yosys/xilinx/lut_map.v
- /usr/local/share/yosys/xilinx/lutrams_map.v
- /usr/local/share/yosys/xilinx/mux_map.v
- /usr/local/share/yosys/xilinx/xc2v_brams.txt
- /usr/local/share/yosys/xilinx/xc2v_brams_map.v
- /usr/local/share/yosys/xilinx/xc3s_mult_map.v
- /usr/local/share/yosys/xilinx/xc3sa_brams.txt
- /usr/local/share/yosys/xilinx/xc3sda_brams.txt
- /usr/local/share/yosys/xilinx/xc3sda_dsp_map.v
- /usr/local/share/yosys/xilinx/xc4v_dsp_map.v
- /usr/local/share/yosys/xilinx/xc5v_dsp_map.v
- /usr/local/share/yosys/xilinx/xc6s_brams.txt
- /usr/local/share/yosys/xilinx/xc6s_brams_map.v
- /usr/local/share/yosys/xilinx/xc6s_dsp_map.v
- /usr/local/share/yosys/xilinx/xc7_brams_map.v
- /usr/local/share/yosys/xilinx/xc7_dsp_map.v
- /usr/local/share/yosys/xilinx/xc7_xcu_brams.txt
- /usr/local/share/yosys/xilinx/xcu_brams_map.v
- /usr/local/share/yosys/xilinx/xcu_dsp_map.v
- /usr/local/share/yosys/xilinx/xcup_urams.txt
- /usr/local/share/yosys/xilinx/xcup_urams_map.v