The cad/yosys port

yosys-0.67 – Yosys Open SYnthesis Suite (cvsweb github mirror)

Description

This is a framework for RTL synthesis tools. It currently has extensive
Verilog-2005 support and provides a basic set of synthesis algorithms for
various application domains.

Yosys can be adapted to perform any synthesis job by combining the existing
passes (algorithms) using synthesis scripts and adding additional passes as
needed by extending the yosys C++ code base.

WWW: https://github.com/YosysHQ

Readme

+-------------------------------------------------------------------------------
| Running ${PKGSTEM} on OpenBSD
+-------------------------------------------------------------------------------

High RAM consumption
====================

Synthesizing FPGAs is a memory intensive task. Even relatively small designs
might lead to errors such as

  libc++abi: terminating due to uncaught exception of type std::bad_alloc
  Abort trap (core dumped)

In this case, editing /etc/login.conf(5), to increase the parameters

  default:\
    datasize-max=8192M:\
    datasize-cur=8192M

helps. Obviously, it is required to log off and on again, before it has any
effect on re-running YoSys.

Maintainer

Thomas Dettbarn

Library dependencies

devel/libffi

Build dependencies

Reverse dependencies

cad/qflow

Files

/usr/local/bin/yosys
/usr/local/bin/yosys-abc
/usr/local/bin/yosys-config
/usr/local/bin/yosys-filterlib
/usr/local/bin/yosys-smtbmc
/usr/local/bin/yosys-witness
/usr/local/share/doc/pkg-readmes/yosys
/usr/local/share/yosys/
/usr/local/share/yosys/abc9_map.v
/usr/local/share/yosys/abc9_model.v
/usr/local/share/yosys/abc9_unmap.v
/usr/local/share/yosys/achronix/
/usr/local/share/yosys/achronix/speedster22i/
/usr/local/share/yosys/achronix/speedster22i/cells_map.v
/usr/local/share/yosys/achronix/speedster22i/cells_sim.v
/usr/local/share/yosys/adff2dff.v
/usr/local/share/yosys/analogdevices/
/usr/local/share/yosys/analogdevices/abc9_model.v
/usr/local/share/yosys/analogdevices/arith_map.v
/usr/local/share/yosys/analogdevices/brams.txt
/usr/local/share/yosys/analogdevices/brams_defs.vh
/usr/local/share/yosys/analogdevices/brams_map.v
/usr/local/share/yosys/analogdevices/cells_map.v
/usr/local/share/yosys/analogdevices/cells_sim.v
/usr/local/share/yosys/analogdevices/dsp_map.v
/usr/local/share/yosys/analogdevices/ff_map.v
/usr/local/share/yosys/analogdevices/lut_map.v
/usr/local/share/yosys/analogdevices/lutrams.txt
/usr/local/share/yosys/analogdevices/lutrams_map.v
/usr/local/share/yosys/analogdevices/mux_map.v
/usr/local/share/yosys/anlogic/
/usr/local/share/yosys/anlogic/arith_map.v
/usr/local/share/yosys/anlogic/brams.txt
/usr/local/share/yosys/anlogic/brams_map.v
/usr/local/share/yosys/anlogic/cells_map.v
/usr/local/share/yosys/anlogic/cells_sim.v
/usr/local/share/yosys/anlogic/eagle_bb.v
/usr/local/share/yosys/anlogic/lutrams.txt
/usr/local/share/yosys/anlogic/lutrams_map.v
/usr/local/share/yosys/choices/
/usr/local/share/yosys/choices/han-carlson.v
/usr/local/share/yosys/choices/kogge-stone.v
/usr/local/share/yosys/choices/sklansky.v
/usr/local/share/yosys/cmp2lcu.v
/usr/local/share/yosys/cmp2lut.v
/usr/local/share/yosys/cmp2softlogic.v
/usr/local/share/yosys/coolrunner2/
/usr/local/share/yosys/coolrunner2/cells_counter_map.v
/usr/local/share/yosys/coolrunner2/cells_latch.v
/usr/local/share/yosys/coolrunner2/cells_sim.v
/usr/local/share/yosys/coolrunner2/tff_extract.v
/usr/local/share/yosys/coolrunner2/xc2_dff.lib
/usr/local/share/yosys/dff2ff.v
/usr/local/share/yosys/ecp5/
/usr/local/share/yosys/ecp5/ccu2c_sim.vh
/usr/local/share/yosys/ecp5/cells_bb.v
/usr/local/share/yosys/ecp5/cells_ff.vh
/usr/local/share/yosys/ecp5/cells_io.vh
/usr/local/share/yosys/ecp5/cells_sim.v
/usr/local/share/yosys/ecp5/common_sim.vh
/usr/local/share/yosys/efinix/
/usr/local/share/yosys/efinix/arith_map.v
/usr/local/share/yosys/efinix/brams.txt
/usr/local/share/yosys/efinix/brams_map.v
/usr/local/share/yosys/efinix/cells_map.v
/usr/local/share/yosys/efinix/cells_sim.v
/usr/local/share/yosys/efinix/gbuf_map.v
/usr/local/share/yosys/gate2lut.v
/usr/local/share/yosys/gatemate/
/usr/local/share/yosys/gatemate/arith_map.v
/usr/local/share/yosys/gatemate/brams.txt
/usr/local/share/yosys/gatemate/brams_init_20.vh
/usr/local/share/yosys/gatemate/brams_init_40.vh
/usr/local/share/yosys/gatemate/brams_map.v
/usr/local/share/yosys/gatemate/cells_bb.v
/usr/local/share/yosys/gatemate/cells_sim.v
/usr/local/share/yosys/gatemate/inv_map.v
/usr/local/share/yosys/gatemate/lut_map.v
/usr/local/share/yosys/gatemate/lut_tree_cells.genlib
/usr/local/share/yosys/gatemate/lut_tree_map.v
/usr/local/share/yosys/gatemate/mul_map.v
/usr/local/share/yosys/gatemate/mux_map.v
/usr/local/share/yosys/gatemate/reg_map.v
/usr/local/share/yosys/gowin/
/usr/local/share/yosys/gowin/arith_map.v
/usr/local/share/yosys/gowin/brams.txt
/usr/local/share/yosys/gowin/brams_map.v
/usr/local/share/yosys/gowin/brams_map_gw5a.v
/usr/local/share/yosys/gowin/cells_latch.v
/usr/local/share/yosys/gowin/cells_map.v
/usr/local/share/yosys/gowin/cells_sim.v
/usr/local/share/yosys/gowin/cells_xtra_gw1n.v
/usr/local/share/yosys/gowin/cells_xtra_gw2a.v
/usr/local/share/yosys/gowin/cells_xtra_gw5a.v
/usr/local/share/yosys/gowin/dsp_map.v
/usr/local/share/yosys/gowin/lutrams.txt
/usr/local/share/yosys/gowin/lutrams_map.v
/usr/local/share/yosys/greenpak4/
/usr/local/share/yosys/greenpak4/cells_blackbox.v
/usr/local/share/yosys/greenpak4/cells_latch.v
/usr/local/share/yosys/greenpak4/cells_map.v
/usr/local/share/yosys/greenpak4/cells_sim.v
/usr/local/share/yosys/greenpak4/cells_sim_ams.v
/usr/local/share/yosys/greenpak4/cells_sim_digital.v
/usr/local/share/yosys/greenpak4/cells_sim_wip.v
/usr/local/share/yosys/greenpak4/gp_dff.lib
/usr/local/share/yosys/ice40/
/usr/local/share/yosys/ice40/abc9_model.v
/usr/local/share/yosys/ice40/arith_map.v
/usr/local/share/yosys/ice40/brams.txt
/usr/local/share/yosys/ice40/brams_map.v
/usr/local/share/yosys/ice40/cells_map.v
/usr/local/share/yosys/ice40/cells_sim.v
/usr/local/share/yosys/ice40/dsp_map.v
/usr/local/share/yosys/ice40/ff_map.v
/usr/local/share/yosys/ice40/latches_map.v
/usr/local/share/yosys/ice40/spram.txt
/usr/local/share/yosys/ice40/spram_map.v
/usr/local/share/yosys/include/
/usr/local/share/yosys/include/backends/
/usr/local/share/yosys/include/backends/cxxrtl/
/usr/local/share/yosys/include/backends/cxxrtl/runtime/
/usr/local/share/yosys/include/backends/cxxrtl/runtime/README.txt
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h
/usr/local/share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h
/usr/local/share/yosys/include/backends/rtlil/
/usr/local/share/yosys/include/backends/rtlil/rtlil_backend.h
/usr/local/share/yosys/include/frontends/
/usr/local/share/yosys/include/frontends/blif/
/usr/local/share/yosys/include/frontends/blif/blifparse.h
/usr/local/share/yosys/include/kernel/
/usr/local/share/yosys/include/kernel/binding.h
/usr/local/share/yosys/include/kernel/bitpattern.h
/usr/local/share/yosys/include/kernel/cellaigs.h
/usr/local/share/yosys/include/kernel/celledges.h
/usr/local/share/yosys/include/kernel/celltypes.h
/usr/local/share/yosys/include/kernel/consteval.h
/usr/local/share/yosys/include/kernel/constids.inc
/usr/local/share/yosys/include/kernel/cost.h
/usr/local/share/yosys/include/kernel/drivertools.h
/usr/local/share/yosys/include/kernel/ff.h
/usr/local/share/yosys/include/kernel/ffinit.h
/usr/local/share/yosys/include/kernel/ffmerge.h
/usr/local/share/yosys/include/kernel/fmt.h
/usr/local/share/yosys/include/kernel/fstdata.h
/usr/local/share/yosys/include/kernel/gzip.h
/usr/local/share/yosys/include/kernel/hashlib.h
/usr/local/share/yosys/include/kernel/io.h
/usr/local/share/yosys/include/kernel/json.h
/usr/local/share/yosys/include/kernel/log.h
/usr/local/share/yosys/include/kernel/macc.h
/usr/local/share/yosys/include/kernel/mem.h
/usr/local/share/yosys/include/kernel/modtools.h
/usr/local/share/yosys/include/kernel/newcelltypes.h
/usr/local/share/yosys/include/kernel/qcsat.h
/usr/local/share/yosys/include/kernel/register.h
/usr/local/share/yosys/include/kernel/rtlil.h
/usr/local/share/yosys/include/kernel/satgen.h
/usr/local/share/yosys/include/kernel/scopeinfo.h
/usr/local/share/yosys/include/kernel/sexpr.h
/usr/local/share/yosys/include/kernel/sigtools.h
/usr/local/share/yosys/include/kernel/threading.h
/usr/local/share/yosys/include/kernel/timinginfo.h
/usr/local/share/yosys/include/kernel/utils.h
/usr/local/share/yosys/include/kernel/yosys.h
/usr/local/share/yosys/include/kernel/yosys_common.h
/usr/local/share/yosys/include/kernel/yosys_config.h
/usr/local/share/yosys/include/kernel/yw.h
/usr/local/share/yosys/include/libs/
/usr/local/share/yosys/include/libs/ezsat/
/usr/local/share/yosys/include/libs/ezsat/ezcmdline.h
/usr/local/share/yosys/include/libs/ezsat/ezminisat.h
/usr/local/share/yosys/include/libs/ezsat/ezsat.h
/usr/local/share/yosys/include/libs/fst/
/usr/local/share/yosys/include/libs/fst/fstapi.h
/usr/local/share/yosys/include/libs/json11/
/usr/local/share/yosys/include/libs/json11/json11.hpp
/usr/local/share/yosys/include/libs/sha1/
/usr/local/share/yosys/include/libs/sha1/sha1.h
/usr/local/share/yosys/include/passes/
/usr/local/share/yosys/include/passes/fsm/
/usr/local/share/yosys/include/passes/fsm/fsmdata.h
/usr/local/share/yosys/include/passes/techmap/
/usr/local/share/yosys/include/passes/techmap/libparse.h
/usr/local/share/yosys/intel/
/usr/local/share/yosys/intel/common/
/usr/local/share/yosys/intel/common/altpll_bb.v
/usr/local/share/yosys/intel/common/brams_m9k.txt
/usr/local/share/yosys/intel/common/brams_map_m9k.v
/usr/local/share/yosys/intel/common/ff_map.v
/usr/local/share/yosys/intel/common/m9k_bb.v
/usr/local/share/yosys/intel/cyclone10lp/
/usr/local/share/yosys/intel/cyclone10lp/cells_map.v
/usr/local/share/yosys/intel/cyclone10lp/cells_sim.v
/usr/local/share/yosys/intel/cycloneiv/
/usr/local/share/yosys/intel/cycloneiv/cells_map.v
/usr/local/share/yosys/intel/cycloneiv/cells_sim.v
/usr/local/share/yosys/intel/cycloneive/
/usr/local/share/yosys/intel/cycloneive/cells_map.v
/usr/local/share/yosys/intel/cycloneive/cells_sim.v
/usr/local/share/yosys/intel/max10/
/usr/local/share/yosys/intel/max10/cells_map.v
/usr/local/share/yosys/intel/max10/cells_sim.v
/usr/local/share/yosys/intel/max10/dsp_map.v
/usr/local/share/yosys/intel_alm/
/usr/local/share/yosys/intel_alm/common/
/usr/local/share/yosys/intel_alm/common/abc9_map.v
/usr/local/share/yosys/intel_alm/common/abc9_model.v
/usr/local/share/yosys/intel_alm/common/abc9_unmap.v
/usr/local/share/yosys/intel_alm/common/alm_map.v
/usr/local/share/yosys/intel_alm/common/alm_sim.v
/usr/local/share/yosys/intel_alm/common/arith_alm_map.v
/usr/local/share/yosys/intel_alm/common/bram_m10k.txt
/usr/local/share/yosys/intel_alm/common/bram_m10k_map.v
/usr/local/share/yosys/intel_alm/common/dff_map.v
/usr/local/share/yosys/intel_alm/common/dff_sim.v
/usr/local/share/yosys/intel_alm/common/dsp_map.v
/usr/local/share/yosys/intel_alm/common/dsp_sim.v
/usr/local/share/yosys/intel_alm/common/lutram_mlab.txt
/usr/local/share/yosys/intel_alm/common/megafunction_bb.v
/usr/local/share/yosys/intel_alm/common/mem_sim.v
/usr/local/share/yosys/intel_alm/common/misc_sim.v
/usr/local/share/yosys/intel_alm/cyclonev/
/usr/local/share/yosys/intel_alm/cyclonev/cells_sim.v
/usr/local/share/yosys/lattice/
/usr/local/share/yosys/lattice/arith_map_ccu2c.v
/usr/local/share/yosys/lattice/arith_map_ccu2d.v
/usr/local/share/yosys/lattice/arith_map_nexus.v
/usr/local/share/yosys/lattice/brams_16kd.txt
/usr/local/share/yosys/lattice/brams_8kc.txt
/usr/local/share/yosys/lattice/brams_map_16kd.v
/usr/local/share/yosys/lattice/brams_map_8kc.v
/usr/local/share/yosys/lattice/brams_map_nexus.v
/usr/local/share/yosys/lattice/brams_nexus.txt
/usr/local/share/yosys/lattice/ccu2c_sim.vh
/usr/local/share/yosys/lattice/ccu2d_sim.vh
/usr/local/share/yosys/lattice/cells_bb_ecp5.v
/usr/local/share/yosys/lattice/cells_bb_nexus.v
/usr/local/share/yosys/lattice/cells_bb_xo2.v
/usr/local/share/yosys/lattice/cells_bb_xo3.v
/usr/local/share/yosys/lattice/cells_bb_xo3d.v
/usr/local/share/yosys/lattice/cells_ff.vh
/usr/local/share/yosys/lattice/cells_io.vh
/usr/local/share/yosys/lattice/cells_map_nexus.v
/usr/local/share/yosys/lattice/cells_map_trellis.v
/usr/local/share/yosys/lattice/cells_sim_ecp5.v
/usr/local/share/yosys/lattice/cells_sim_nexus.v
/usr/local/share/yosys/lattice/cells_sim_xo2.v
/usr/local/share/yosys/lattice/cells_sim_xo3.v
/usr/local/share/yosys/lattice/cells_sim_xo3d.v
/usr/local/share/yosys/lattice/common_sim.vh
/usr/local/share/yosys/lattice/dsp_map_18x18.v
/usr/local/share/yosys/lattice/dsp_map_nexus.v
/usr/local/share/yosys/lattice/latches_map.v
/usr/local/share/yosys/lattice/lrams_map_nexus.v
/usr/local/share/yosys/lattice/lrams_nexus.txt
/usr/local/share/yosys/lattice/lutrams_map_nexus.v
/usr/local/share/yosys/lattice/lutrams_map_trellis.v
/usr/local/share/yosys/lattice/lutrams_nexus.txt
/usr/local/share/yosys/lattice/lutrams_trellis.txt
/usr/local/share/yosys/lattice/parse_init.vh
/usr/local/share/yosys/microchip/
/usr/local/share/yosys/microchip/LSRAM.txt
/usr/local/share/yosys/microchip/LSRAM_map.v
/usr/local/share/yosys/microchip/arith_map.v
/usr/local/share/yosys/microchip/brams_defs.vh
/usr/local/share/yosys/microchip/cells_map.v
/usr/local/share/yosys/microchip/cells_sim.v
/usr/local/share/yosys/microchip/polarfire_dsp_map.v
/usr/local/share/yosys/microchip/uSRAM.txt
/usr/local/share/yosys/microchip/uSRAM_map.v
/usr/local/share/yosys/mul2dsp.v
/usr/local/share/yosys/nanoxplore/
/usr/local/share/yosys/nanoxplore/arith_map.v
/usr/local/share/yosys/nanoxplore/brams.txt
/usr/local/share/yosys/nanoxplore/brams_init.vh
/usr/local/share/yosys/nanoxplore/brams_map.v
/usr/local/share/yosys/nanoxplore/cells_bb.v
/usr/local/share/yosys/nanoxplore/cells_bb_l.v
/usr/local/share/yosys/nanoxplore/cells_bb_m.v
/usr/local/share/yosys/nanoxplore/cells_bb_u.v
/usr/local/share/yosys/nanoxplore/cells_map.v
/usr/local/share/yosys/nanoxplore/cells_sim.v
/usr/local/share/yosys/nanoxplore/cells_sim_l.v
/usr/local/share/yosys/nanoxplore/cells_sim_m.v
/usr/local/share/yosys/nanoxplore/cells_sim_u.v
/usr/local/share/yosys/nanoxplore/cells_wrap.v
/usr/local/share/yosys/nanoxplore/cells_wrap_l.v
/usr/local/share/yosys/nanoxplore/cells_wrap_m.v
/usr/local/share/yosys/nanoxplore/cells_wrap_u.v
/usr/local/share/yosys/nanoxplore/io_map.v
/usr/local/share/yosys/nanoxplore/latches_map.v
/usr/local/share/yosys/nanoxplore/rf_init.vh
/usr/local/share/yosys/nanoxplore/rf_rams_l.txt
/usr/local/share/yosys/nanoxplore/rf_rams_m.txt
/usr/local/share/yosys/nanoxplore/rf_rams_map_l.v
/usr/local/share/yosys/nanoxplore/rf_rams_map_m.v
/usr/local/share/yosys/nanoxplore/rf_rams_map_u.v
/usr/local/share/yosys/nanoxplore/rf_rams_u.txt
/usr/local/share/yosys/nexus/
/usr/local/share/yosys/nexus/cells_sim.v
/usr/local/share/yosys/nexus/cells_xtra.v
/usr/local/share/yosys/nexus/parse_init.vh
/usr/local/share/yosys/pmux2mux.v
/usr/local/share/yosys/python3/
/usr/local/share/yosys/python3/smtio.py
/usr/local/share/yosys/python3/ywio.py
/usr/local/share/yosys/quicklogic/
/usr/local/share/yosys/quicklogic/common/
/usr/local/share/yosys/quicklogic/common/cells_sim.v
/usr/local/share/yosys/quicklogic/pp3/
/usr/local/share/yosys/quicklogic/pp3/abc9_map.v
/usr/local/share/yosys/quicklogic/pp3/abc9_model.v
/usr/local/share/yosys/quicklogic/pp3/abc9_unmap.v
/usr/local/share/yosys/quicklogic/pp3/cells_map.v
/usr/local/share/yosys/quicklogic/pp3/cells_sim.v
/usr/local/share/yosys/quicklogic/pp3/ffs_map.v
/usr/local/share/yosys/quicklogic/pp3/latches_map.v
/usr/local/share/yosys/quicklogic/pp3/lut_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/
/usr/local/share/yosys/quicklogic/qlf_k6n10f/TDP18K_FIFO.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/arith_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/bram_types_sim.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/brams_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/brams_sim.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/cells_sim.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/dsp_final_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/dsp_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/dsp_sim.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/ffs_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/libmap_brams.txt
/usr/local/share/yosys/quicklogic/qlf_k6n10f/libmap_brams_map.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/sram1024x18_mem.v
/usr/local/share/yosys/quicklogic/qlf_k6n10f/ufifo_ctl.v
/usr/local/share/yosys/sdc/
/usr/local/share/yosys/sdc/graph-stubs.sdc
/usr/local/share/yosys/sf2/
/usr/local/share/yosys/sf2/arith_map.v
/usr/local/share/yosys/sf2/cells_map.v
/usr/local/share/yosys/sf2/cells_sim.v
/usr/local/share/yosys/simcells.v
/usr/local/share/yosys/simlib.v
/usr/local/share/yosys/smtmap.v
/usr/local/share/yosys/techmap.v
/usr/local/share/yosys/xilinx/
/usr/local/share/yosys/xilinx/abc9_model.v
/usr/local/share/yosys/xilinx/arith_map.v
/usr/local/share/yosys/xilinx/brams_defs.vh
/usr/local/share/yosys/xilinx/brams_xc2v.txt
/usr/local/share/yosys/xilinx/brams_xc2v_map.v
/usr/local/share/yosys/xilinx/brams_xc3sda.txt
/usr/local/share/yosys/xilinx/brams_xc3sda_map.v
/usr/local/share/yosys/xilinx/brams_xc4v.txt
/usr/local/share/yosys/xilinx/brams_xc4v_map.v
/usr/local/share/yosys/xilinx/brams_xc5v_map.v
/usr/local/share/yosys/xilinx/brams_xc6v_map.v
/usr/local/share/yosys/xilinx/brams_xcu_map.v
/usr/local/share/yosys/xilinx/brams_xcv.txt
/usr/local/share/yosys/xilinx/brams_xcv_map.v
/usr/local/share/yosys/xilinx/cells_map.v
/usr/local/share/yosys/xilinx/cells_sim.v
/usr/local/share/yosys/xilinx/cells_xtra.v
/usr/local/share/yosys/xilinx/ff_map.v
/usr/local/share/yosys/xilinx/lut_map.v
/usr/local/share/yosys/xilinx/lutrams_xc5v.txt
/usr/local/share/yosys/xilinx/lutrams_xc5v_map.v
/usr/local/share/yosys/xilinx/lutrams_xcu.txt
/usr/local/share/yosys/xilinx/lutrams_xcv.txt
/usr/local/share/yosys/xilinx/lutrams_xcv_map.v
/usr/local/share/yosys/xilinx/mux_map.v
/usr/local/share/yosys/xilinx/urams.txt
/usr/local/share/yosys/xilinx/urams_map.v
/usr/local/share/yosys/xilinx/xc3s_mult_map.v
/usr/local/share/yosys/xilinx/xc3sda_dsp_map.v
/usr/local/share/yosys/xilinx/xc4v_dsp_map.v
/usr/local/share/yosys/xilinx/xc5v_dsp_map.v
/usr/local/share/yosys/xilinx/xc6s_dsp_map.v
/usr/local/share/yosys/xilinx/xc7_dsp_map.v
/usr/local/share/yosys/xilinx/xcu_dsp_map.v

The cad/yosys port

yosys-0.67 – Yosys Open SYnthesis Suite (cvsweb github mirror)

Description

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Library dependencies

Build dependencies

Reverse dependencies

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