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The devel/vtags port

vtags-0.10 – VHDL tags generator (cvsweb github mirror)

Description

vtags will generate a tags file that can be used by tagging editors like
vi(m). It is designed to generate tags from VHDL '87 files. It should
work with later versions of VHDL but does not support all the language
constructs.
WWW: http://www.peterantoine.me.uk/vtags.html

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