The emulators/spike port

spike-1.1.0 – RISC-V ISA simulator (cvsweb github mirror)

Description

Spike, the RISC-V ISA Simulator, implements a functional model of one or
more RISC-V harts.

WWW: https://github.com/riscv-software-src/riscv-isa-sim

Maintainer

Jasper Lievisse Adriaanse

Only for arches

aarch64 alpha amd64 arm hppa i386 mips64 mips64el powerpc powerpc64 riscv64 sparc64

Not for arches

i386

Broken

on powerpc: internal 'exception trap_instruction_page_fault' at runtime

Categories

Library dependencies

devel/boost

Build dependencies

Run dependencies

devel/dtc

Files

/usr/local/bin/elf2hex
/usr/local/bin/spike
/usr/local/bin/spike-dasm
/usr/local/bin/spike-log-parser
/usr/local/bin/termios-xspike
/usr/local/bin/xspike
/usr/local/include/fesvr/
/usr/local/include/fesvr/byteorder.h
/usr/local/include/fesvr/config.h
/usr/local/include/fesvr/context.h
/usr/local/include/fesvr/device.h
/usr/local/include/fesvr/dtm.h
/usr/local/include/fesvr/elf.h
/usr/local/include/fesvr/elfloader.h
/usr/local/include/fesvr/htif.h
/usr/local/include/fesvr/htif_hexwriter.h
/usr/local/include/fesvr/htif_pthread.h
/usr/local/include/fesvr/memif.h
/usr/local/include/fesvr/option_parser.h
/usr/local/include/fesvr/rfb.h
/usr/local/include/fesvr/syscall.h
/usr/local/include/fesvr/term.h
/usr/local/include/fesvr/tsi.h
/usr/local/include/riscv/
/usr/local/include/riscv/mmio_plugin.h
/usr/local/lib/libcustomext.so
/usr/local/lib/libsoftfloat.so
/usr/local/lib/pkgconfig/riscv-disasm.pc
/usr/local/lib/pkgconfig/riscv-fesvr.pc